CPLD vs FPGA


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Buck converter Basics Notes for Designing and Implementation - PART 1 Gathering Info & Calculating Parameters

I am planning to simulate and implement a buck converter in an bread board.So I was searching all over the web for good material to understand and design it.I could find that none of the texts followed at universities is not good enough for implementation of the circuit physically(I really dont understand the reason the universities provide us with such texts to follow and judge every one based on the marks they get by following such texts --- Ever have you wondered why the students with low marks who tries perform so badly... Just think of this context.) Anyway I was able to find many such papers from internet explaining the basics of it and I found this particular one very easy to understand and follow.I must really thank Bob Dildine who is its author to prove its not rocket science but its all about the concept and less about the equations thats proves it. Notes I made while designing the buck converter using the above mentioned(Link to download the Buck Converter basics Notes ...
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Buck converter Basics Notes for Designing and Implementation - PART 2 Simulation

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Tried simulating with Qucs The simulation didn't come of well as I hoped.The Output is showing some kind of  waveform I have no idea of looking at how it became so. Simulated Circuit using IRF Z44 Mosfet (Now Vishay MOSFET Z44 )     Simulated Circuit using IRF Z44 MOSFET (Vishay) Waveform I got for Buck Converter Circuit     Now After trying the same in TINA spice simulator from Texas instruments I couldn't successfully produce an output.As I remember from the "Buck converter demystified" reference the ripple current will be maximum at the 0.5 duty ratio.So I have decided to redesign the parameter values for a different duty ratio of 0.25.   New parameters are;     Duty Ratio : 0.25   Period of Switching cycle (SW1) : 20us   Time for which SW1 is ON :0.25*20us = 5us   Ripple Current : 0.33*0.6 = 0.198A   Inductor : 454.54uH   Capacitor  at output (@ 100mv overshoot ...
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Driver Circuit for the Postive Buck Boost Circuit

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I have been out of the power electronics design for at least a year cause of me spending time in the particular robotics based project which I cannot disclose details of in public. The said project is almost getting over and now only the power part is left as the controllers designed. Hence I thought I will use this opportunity to let myself come back again into the power electronics designing. So I start with the drive circuit for any MOSFET. I am in the learning phase but will have to finish and design the part within a week. Hence what I provide may be something wrongly understood or perhaps misinterpreted.So if you come across anything like that please do tell me as  comments and that would help me so much. I am using the ST electronics Application note for gate circuits design for MOSFET/IGBT.I will provide the link to the document at the end of post. Update 1 But as I started reading the document started on the highly intelligent description of the mosfet inner work...
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